1. Field of the Invention
This invention relates generally to a semiconductor fabrication process, and, more particularly, to determining a possible cause of a fault in a semiconductor fabrication process.
2. Description of the Related Art
There is a constant drive in the semiconductor industry to increase the quality, reliability, and throughput of integrated circuit devices such as microprocessors, memory devices and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably.
These demands by the consumer have resulted in some improvements in the manufacture of semiconductor devices as well as in the manufacture of integrated circuit devices incorporating such semiconductor devices. Reducing the defects in the manufacture of these devices lowers the cost of the devices themselves. Accordingly, the cost of the final product incorporating these devices is also reduced, thus providing inherent monetary benefits to both the consumer and manufacturer.
Semiconductor manufacturing processes have become more reliable and robust over the past few years. Semiconductor manufacturing processes of today may include an intricate collection of multiple processing tools for manufacturing semiconductor devices. While the benefits of linking multiple processing tools are inherently obvious, there can, however, be some drawbacks, particularly from the standpoint of troubleshooting problems or faults. That is, determining the source of a fault that occurs during the semiconductor manufacturing process may prove to be challenging, as the fault may have occurred in any one of the several processing tools that operate on the semiconductor device along the way. Failing to identify the source of the problem expeditiously may naturally delay any potential corrective measures that can be taken to address the problem. Because of this delay, the operation of the semiconductor manufacturing process may be adversely affected, thereby resulting in potential increase in costs for the manufacturer and consumer.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one embodiment of the present invention, a method is provided for determining a cause of a fault in a semiconductor fabrication process. The method includes determining a first fault in a first processing tool executing under first operating conditions and determining a second fault in a second processing tool executing under second operating conditions. The method further includes identifying a possible source of the second fault based on at least the first operating conditions of the first processing tool.
In another embodiment of the present invention an apparatus is provided for determining a cause of a fault in a semiconductor fabrication process. The apparatus includes an interface and a control unit. The control unit is communicatively coupled to the interface. The control unit is further adapted to detect a first fault in a first processing tool, detect a second fault in a second processing tool, and determine a cause of the second fault based on detecting the first fault.
In a further embodiment of the present invention, an article comprising one or more machine-readable storage media containing instructions is provided for determining a possible cause of a fault in a semiconductor fabrication process. The one or more instructions, when executed, enable a processor to determine that a fault condition exists in a first processing tool, determine that a fault condition exists in a second processing tool, and determine if the fault condition in the second processing tool has a common cause as the fault condition in the first processing tool.
In yet another embodiment of the present invention, a system is provided for determining a possible cause of a fault in a semiconductor fabrication process. The system includes a first processing tool, a second processing tool, and a fault detection and analysis unit The first processing tool is adapted to process a semiconductor device. The second processing tool is adapted to process the semiconductor device. The fault detection and analysis unit is adapted to determine that a fault condition is present in the first and second processing tools, and determine if the first and second processing tools have at least one common configuration element in response to determining that the fault condition is present in the first and second processing tools.
In another embodiment of the present invention an apparatus is provided for determining a cause of a fault in a semiconductor fabrication process. The apparatus includes an interface and a control unit. The control unit is communicatively coupled to the interface. The control unit is adapted to detect a fault in a first processing tool and determine that the detected fault is due to an error in delivering a resource supply to a second processing tool.
In another embodiment of the present invention an apparatus is provided for determining a cause of a fault in a semiconductor fabrication process. The apparatus includes an interface and a control unit. The control unit is communicatively coupled to the interface and is adapted to detect a fault in a first processing tool and determine that the detected fault is due to an error in delivering a resource supply to a second processing tool.